Video Solutions and Answers for GATE 2015 ECE Electronic Devices & Circuits (EDC)

GATE 2015 (Electronic Devices & Circuits)

1.       Which one of the following processes is preferred to form the gate dielectric (SiO₂) of MOSFET?

a.       Sputtering

b.      Molecular Beam Epitaxy

c.       Wet Oxidation

d.      Dry Oxidation

 Solution :          https://www.youtube.com/watch?v=aT-PUfpeyOY





2.       In the circuit shown, the BJT has a current gain (β) of 50. For an emitter base voltage V_EB = 600 mV, the emitter collector voltage V_EC (in volts) is_______________

 Solution :         https://www.youtube.com/watch?v=RoAi_j7vZpo

3.       If the base width in a bipolar junction transistor is doubled, which one of the following statements will be TRUE?

a.       Current gain will increase

b.      Unity gain frequency will increase

c.       Emitter base junction capacitance will increase

d.      Early voltage will increase
 

 Solution :       https://www.youtube.com/watch?v=bdDtbyWDUeM




        
4.       In the circuit shown, assume that the diodes D₁ and D₂ are ideal. The average value of voltage V_ab (in volts), across terminals a and b is ________________

  Solution :        https://www.youtube.com/watch?v=nK21y4c_m0Q 

5.       The electric field profile in the depletion region of a PN junction in equilibrium is shown in the figure. Which one of the following is NOT TRUE?

a.       The left side of the junction is N-type and the right side is  P-type

b.      Both the N-type and P-type depletion regions are uniformly doped

c.       The potential difference across the depletion region is 700 mV

d.      If the P-type region has a doping concentration of 10¹⁵ cm^-3, then the doping concentration in the N-type region will be 10¹⁶ cm^-3
 

 Solution :         https://www.youtube.com/watch?v=LNjwCHJv3UE 





6.       In the circuit shown, the both the enhancement mode NMOS transistors have the following characteristics: K_n = µ_n.C_ox(W/L) = 1 mA/V², V_TN = 1 volt.

Assume that the channel length modulation parameter λ is zero and body is shorted to source. The minimum supply voltage VDD (in volts) needed to ensure that transistor M1 operates in saturation mode of operation is ___________________

  Solution :        https://www.youtube.com/watch?v=nAvaaApnnao 

7.       The current in an enhancement mode NMOS transistor biased in saturation mode was measured to be 1 mA at a drain to source voltage of 5 volts. When the drain – source voltage was increased to 6 volts, while keeping gate-source voltage same, the drain current increased to 1.02 mA. Assume that drain to source saturation voltages is much smaller than the applied drain source voltage. The channel length modulation parameter λ (in V^-1) is __________

 Solution :     https://www.youtube.com/watch?v=4AebD_Jv5C8     

8.       An NPN BJT having reverse saturation current I_s = 10^-15 A is biased in the forward active region with V_BE =700 mV. The thermal voltage (V_T) is 25 mV and the current gain (β) may vary from 50 to 150 due to manufacturing variations. The maximum emitter current (in µA) is ____________________________

 Solution :          https://www.youtube.com/watch?v=-Ff_pmSDNlQ

9.       A silicon sample is uniformly doped with donor type impurities with a concentration of 10¹⁶ cm^-3. The electron and hole mobilities in the sample  are 1200 cm²/V-sec and 400 cm²/V-sec respectively. Assume complete ionization of impurities. The charge of an electron is 1.6x10^-19 C. The resistivity of the sample (in Ω-cm) is _______________

 Solution :       https://www.youtube.com/watch?v=Zo6ei-B4gX8   

10.   A region of negative differential resistance is observed in the current voltage characteristics of a silicon PN junction if

a.       Both the P-region and N-region are heavily doped

b.      The N-region is heavily doped compared to P-region

c.       The P-region is heavily doped compared to N-region

d.      An intrinsic silicon region is inserted between the P-region and the N-region
 

 Solution :     https://www.youtube.com/watch?v=AfBuhR7yT50     





11.   For the circuit shown, assume ideal diodes. The shape of the output (V_out) for the given sine wave input (V_in) will be ________________

 Solution :        https://www.youtube.com/watch?v=zvClgr7lhQE

12.   In the circuit shown below, the Zener diode is ideal and the Zener voltage is 6 volts. The output voltage V_o (in volts) is _______________

  Solution :       https://www.youtube.com/watch?v=cUtPNGP5npk

13.   For the NMOSFET in the circuit shown, the threshold voltage is V_th greater than zero. The source voltage V_SS is varied from 0 to V_DD. Neglecting the channel length modulation, the drain current I_D as a function of V_SS is represented by

  Solution :     https://www.youtube.com/watch?v=qipvNgPQNDM  

14.   For a silicon diode with ling P and N regions, the acceptor and donor impurity concentrations are 1x10¹⁷ cm^-3 and 1x10¹⁵ cm^-3 respectively. The lifetimes of electron in P-region and holes in N-region are both 100 µs. The electron and hole diffusion coefficients are 49 cm²/sec and 36 cm²/sec respectively. Assume thermal voltage is 26 mV, the intrinsic carrier concentration is 1x10¹⁰ cm^-3 and q = 1.6x10^-19 C. When a forward voltage of 208 mV is applied across the diode, the hole current density (in nA/cm²) injected from P-region to N-region is  ___________

 Solution :     https://www.youtube.com/watch?v=aR7Vz7Fm3co  

15.   A MOSFET in saturation has a drain current of 1 mA for V_DS = 0.5 volts. If the channel length modulation coefficient is 0.05 V^-1, the output resistance (in kΩ) of the MOSFET is ________

 Solution :      https://www.youtube.com/watch?v=uFmH59NNz6s  

16.   The built in potential of an abrupt PN junction is 0.75 volts. If its junction capacitance (C_J) at a reverse bias (V_R) of 1.25 volts is 5 pF. The value of C_J (in pF) when V_R = 7.25 volts is _____

 Solution :       https://www.youtube.com/watch?v=dk28aPHYdnY 

17.   A piece of silicon is doped uniformly with phosphorous with a doping concentration of 10¹⁶ per cm³. The expected value of mobility verses doping concentration for silicon assuming full dopant ionization is shown below. The charge of an electron is 1.6x10^-19 C. The conductivity (in Simons/cm) of  the silicon sample at 300^oK is _______________

  Solution :        https://www.youtube.com/watch?v=6im7x-zbWH4

18.   An N-type silicon sample is uniformly illuminated with light which generates 10²⁰ electron-hole pairs per cm³ per second. The minority carrier lifetime in the sample is 1 µs. In the steady state, the hole concentration in the sample is approximately 10^x, where x is an integer. The value of x is _________________

 Solution :     https://www.youtube.com/watch?v=Cd_4k0VGFXg   

19.   In MOS capacitor with an oxide layer thickness of 10 nm. The maximum depletion layer thickness is 100 nm. The permittivity’s of the semiconductor and the oxide layer are ε_s and ε_ox  respectively. Assuming ε_s/ε_ox = 3, the ratio of the maximum capacitance to the minimum capacitance of this MOS capacitor is ____________

 Solution :      https://www.youtube.com/watch?v=eIk6sCXiKbY 

20.   The energy band diagram and the electron density profile n(x) in a semiconductor are shown in the figures.

  Solution :        https://www.youtube.com/watch?v=oibHxv4SAs8

21.   A DC voltage of 10 volts is applied across an N-type silicon bar having a rectangular cross section and length of 1 cm as shown. The donor doping concentration N_D and the mobility of electron µ_n are 10¹⁶ cm^-3 and 1000 cm²/V-sec respectively. The average time (in µs) taken by the electrons to move from one end of the bar to the other end is _______________

  Solution :     https://www.youtube.com/watch?v=kOhp3iqtlSk  

22.   The diode in the circuit given below has V_ON = 0.7 volts but is ideal otherwise. The current (in mA) in the 4 kΩ resistor is __________________

  Solution :    https://www.youtube.com/watch?v=pk_MWnHnVfo